The present invention relates to a digital time-division multiple transmission and, more particularly, to improvements in the DS3.C-bit parity frame system, which is prescribed in American National Standard T1.107-1990 and also in Proposed Contribution to CCITT (ITU-T), T1x1. 4 AT&T, Jan. 27, 1992.
More specifically, the present invention relates to a DS3.C-bit parity frame transmitting and receiving system and, more particularly, to a transmitting and receiving system used in a DS3 level, DS3.C-bit parity frame transmission system in a PCM communication system.
In the DS3.C-bit parity frame system, 21 DS2 level control bits (C-bits) which are provided in one multi-frame, are used for providing various alarms and also for exchange of information.
FIG. 4 shows the configuration of the multi-frame. The multi-frame has a 4760-bit configuration comprising 7 rows.times.8 columns.times.85 slots. The 1st row, 1st column contains information of an X-bit and 84 other bits. The 1st row, 2nd column contains information of a F1-bit and 84 other bits. The 1st row, 3rd column contains information of an AIC-bit and 84 other bits. The 1st row, 4th column contains information of a F0-bit and 84 other bits. The 1st row, 5th column contains information of a Na-bit and 84 other bits. The 1st row, 6th column contains information of a F0-bit and 84 other bits. The 1st row, 7th column contains information of FEA-bit and other bits. The 1st row, 8th column contains information of a F1-bit (0 bit), an S1-bit and 83 other bits. Among the 4760 bits are 28 F-bits, 2 X-bits, 2 P-bits, 3 M-bits, one AIC-bit, one Na-bit, one FEA-bit, 9 C1-bits, 3 CP-bits, 3 FEBE-bits, 3 DLt-bits, 7 S-bits and 4697 data bits.
In the prior art DS3.C-bit parity frame system, however, the control bits which are necessary for DS2 level signal are used for other purposes. Therefore, where the DS3.C-bit parity frame system is used, it is impossible to accommodate and handle the DS2 level signal.
American National Standard and Proposed Contribution to CCITT, noted above, prescribe the DS3. C-bit parity frame transmission system, and FIG. 9 shows the format (or configuration) of the prescribed DS3.C-bit parity multi-frame.
This frame format is obtained with a PCM multiplex system as shown in FIG. 10. A multiplex signal of DS3 level (44.736 MHz) is obtained through bit multiplexing of DS2 level signal (6.312 MHz) for 7 channels in a multiplexer 200A. The DS2 level signal for each channel is obtained through bit multiplexing of DS1 level signal (1.544 MHz) for 4 channels.
Shown in FIG. 9 is the DS3.C-bit parity multi-frame format that is obtained in this way. The format comprises 7 channels, i.e., 1st to 7th channels. Each channel comprises 85 slots (or bits).times.8, i.e., 680 slots (or bits). The leading bit of each 85-slot group contains a piece of prescribed information (i.e., overhead information, such as X, F1, AIC, F0, Na, FEA, P, CP, FEBE, DLt) that is superimposed, and DS2 level signal bits are multiplexed to each slot of the 84 other slots.
Particularly, bit portions shown by control bits in the frame shown in FIG. 9 are commonly called C-bits. In one multi-frame, 7.times.3=21 C-bits are present. These 21 C-bits are used for providing various alarms and also for transmitting and receiving control information.
In the PCM communication system with such a frame format, it is sometimes required as shown in FIG. 11, that for multiplexing the DS2 level signal applied to the multiplexer 200A to obtain the DS3 level signal, the DS2 level signal be externally supplied directly as input to the multiplexer 200A and multiplexed to the DS3 level signal through one of switches S1-S7, instead of obtaining the DS2 level signal through the multiplexing of the DS1 level signal as the preceding level signal.
For example, it may be desired that DS2 level signal be accommodated externally in the 1st channel of the DS2 level through the switch S1. However, the 1st channel control bits (i.e., three C-bits of AIC, Na and FEA in FIG. 9) have already been used for other purposes, and consequently, it is impossible to accommodate the external DS2 level signal.
This also applies to the other channels. Therefore, in the prior art DS3 level C-bit parity multi-frame format PCM communication system, no DS2 level signal is externally supplied and accommodated.